Cadence Design Systems Q4 2025 Earnings Transcript

Key Financial Highlights and Takeaways

Cadence Design Systems achieved impressive financial results for the fiscal year 2025, marking a significant milestone with annual revenue reaching $5.3 billion, which reflects a robust 14% year-over-year growth. In the fourth quarter alone, the company generated $1.4 billion in revenue, underscoring sustained momentum across its operations. The GAAP operating margin for the full fiscal year stood at 28.2%, while the non-GAAP operating margin was an outstanding 44.6%, as of the period ending December 31, 2025. For the fourth quarter, these figures were even stronger, with GAAP operating margin at 32.2% and non-GAAP at 45.8%.

Earnings per share also demonstrated substantial progress, with GAAP EPS for fiscal 2025 recorded at $4.06 and non-GAAP EPS at $7.14. In Q4, GAAP EPS was $1.42, complemented by a non-GAAP EPS of $1.99. The company concluded the fiscal year with a record-breaking backlog of $7.8 billion, well ahead of initial projections, signaling strong future revenue visibility and customer commitment. On the balance sheet, year-end cash reserves totaled $3.0 billion, against outstanding debt principal of $2.5 billion. Operating cash flow was particularly strong, amounting to $553 million in the fourth quarter and $1.7 billion for the entire year. Additionally, Cadence allocated $925 million towards share repurchases during fiscal 2025, reflecting confidence in its long-term value creation.

Core electronic design automation (EDA) revenue experienced a 13% increase over the fiscal year, driven by heightened demand in key sectors. Recurring software revenue rebounded to double-digit growth in the fourth quarter, highlighting the resilience and scalability of the subscription model. The hardware segment marked another record-breaking year, securing over 30 new customers amid surging demand from artificial intelligence (AI) applications and hyperscale data centers. The company added 25 new digital full flow customer engagements in fiscal 2025, further expanding its market penetration.

A major highlight was the introduction of ChipsTech AI SuperAgent, positioned as the pioneering agentic AI solution designed to automate chip design and verification processes, promising up to 10x productivity gains in tasks such as design coding, test bench generation, and debugging. Customer testimonials reinforce this impact, with Samsung US reporting a 4x productivity boost using Cerberus AI Studio, and Altera noting 7 to 10x improvements in specific workflow segments. Intellectual property (IP) revenue surged nearly 25% in fiscal 2025, fueled by robust demand from AI, high-performance computing (HPC), and automotive industries. System design and analysis revenue grew by 13%, bolstered by advancements like the 3D IC platform, which serves as a critical enabler for multichip architectures in next-generation AI and HPC systems.

Guidance for Fiscal 2026 and First Quarter

Looking ahead, Cadence has outlined optimistic guidance for fiscal 2026, projecting revenue between $5.9 billion and $6.0 billion. GAAP operating margin is expected to range from 31.75% to 32.75%, with non-GAAP operating margin forecasted at 44.75% to 45.75%. GAAP EPS is anticipated to be $4.95 to $5.05, while non-GAAP EPS is projected at $8.05 to $8.15. Operating cash flow is targeted at approximately $2.0 billion, with plans to deploy about 50% of free cash flow for share repurchases. Notably, around 67% of 2026 revenue is expected to derive from the starting backlog, providing substantial multiyear visibility.

For the first quarter of 2026, revenue is guided between $1.4 billion and $1.5 billion, with GAAP operating margin at 30% to 31% and non-GAAP at 44% to 45%. GAAP EPS is expected in the $1.16 to $1.22 range, and non-GAAP EPS at $1.89 to $1.95. Geographically, China is projected to account for 12% to 13% of revenue, consistent with recent trends. Recurring revenue is anticipated to maintain its strong mix at approximately 80% of total revenue in 2026.

Full Earnings Call Transcript

Anirudh Devgan, President and Chief Executive Officer of Cadence Design Systems, opened the call by highlighting the company’s exceptional performance in the fourth quarter, capping off a remarkable fiscal 2025. The year saw 14% revenue growth and an impressive 45% operating margin overall. Cadence ended 2025 with a record backlog of $7.8 billion, surpassing initial plans and demonstrating the broad strength of its product portfolio, particularly with growing contributions from AI-driven solutions.

Devgan emphasized the foundational importance of Cadence’s engineering software, describing it through a three-layer cake framework. The base layer consists of accelerated compute capabilities, the critical middle layer involves principal simulation and optimization—interrupted briefly by Richard Gu noting AI’s role—and the top layer leverages AI for intelligent exploration and generation. This integrated approach ensures that Cadence’s AI solutions deliver not only speed but also physical accuracy rooted in scientific principles.

Building on this structure, the company is rolling out agentic AI workflows powered by intelligent agents that autonomously invoke underlying tools. These AI flows serve as force multipliers, allowing customers to broaden design exploration, speed up time-to-market, boost product usage, and foster deeper platform engagement. Momentum is building on dual fronts: AI for design and design for AI. In AI for design, the Cadence AI portfolio is gaining significant traction among leading market-shaping customers. A recent launch was ChipsTech AI SuperAgent, heralded as the world’s first agentic AI solution for automating chip design and verification. Grounded in proven, physically accurate technology, it offers up to 10x productivity improvements across tasks like design coding, test bench generation, and debugging. Endorsements from Qualcomm, NVIDIA, Altera, Tenstorin, and others underscore its appeal.

Other AI products, including Cadence Cerebras, Vericium, and Allegro xAI, are scaling rapidly, while LLM-based design agents powered by the JEDI Data Platform are yielding impressive outcomes. On the design for AI front, the AI infrastructure phase is accelerating, with architectures scaling in size and complexity. Customers are increasingly adopting Cadence’s full flows to tackle performance, power, and time-to-market hurdles. Collaborations with market leaders continue for next-generation AI designs in training, inference, and scaling.

Cadence deepened its longstanding partnership with Broadcom via a strategic collaboration to pioneer agentic AI workflows for Broadcom’s next-generation products. The company also expanded its presence at multiple premier hyperscalers across EDA, hardware, IP, and system software solutions. Emerging opportunities in physical AI are particularly exciting, with Cadence’s comprehensive portfolio ideally suited to help autonomous driving and robotics firms address multimodal silicon and system challenges.

Internally, AI is being applied to enhance efficiency in engineering, go-to-market strategies, and operations. In 2025, partnerships with leading foundries advanced further: collaboration with TSMC expanded to support next-gen AI flows on N2 and A16 technologies; engagement with Intel Foundry strengthened by joining the Intel Foundry Accelerator Design Services Alliance; RAPIDUS committed broadly to Cadence’s core EDA software portfolio across digital, custom analog, and verification; and Samsung Foundry deepened ties, leveraging Cadence’s AI-driven design and IP solutions.

Product highlights for Q4 and fiscal 2025 were driven by accelerating compute demands from AI infrastructure buildouts and next-gen data center needs, creating vast opportunities for the core EDA portfolio. Core EDA revenue grew 13% in 2025, with recurring software reaccelerating to double-digit growth in Q4, affirming the model’s strength and endurance. The hardware business achieved another record year, adding over 30 new customers and seeing substantially higher repeat demand from AI and hyperscalers. Seven of the top 10 customers in 2025 were Dynamic Duo customers—those utilizing both software and hardware—highlighting the unique value of these systems. With a robust backlog entering 2026, another record hardware year is anticipated.

The digital portfolio had a strong year, propelled by full flow solution proliferation, adding 25 new digital full flow customer logos. Footprint expanded at a top hyperscaler with AI-driven synthesis and implementation solutions, including 3D IC platforms. A leading hyperscaler adopted the Cadence digital full flow for its inaugural full customer-owned tooling AI chip tapeout. Cadence Cerberus proliferated widely, and Cerberus AI Studio adoption accelerated; Samsung US recently used it for SF2 design tapeout, achieving 4x productivity gains.

In custom and analog domains, the Spectre circuit simulator experienced significant growth at top AI and memory firms. Virtuoso Studio, the industry benchmark for custom and mixed-signal design, gained continued traction in AI-driven design migrations across its extensive base. A leading multinational electronics and EV customer achieved 30% layout efficiency gains via AI-driven design migration. IP business momentum was robust, with nearly 25% revenue growth in 2025, driven by an expanding portfolio and STAR IP’s pivotal role in AI, HPC, and automotive. Significant expansions and competitive wins at marquee customers showcased superior IP performance in HBM, UCIe, PCIe, DDR, and SerDes. Strong adoption of memory IP, including groundbreaking LPDDR6, enables required performance and efficiency for next-gen AI workloads. In Q4, Tensilica HiFi IQ DSP launched, delivering up to 8x higher AI performance and over 25% energy savings for automotive infotainment, smartphones, and home entertainment.

System design and analysis business grew revenue 13% in 2025. The Millennium M2000 AI supercomputer, featuring NVIDIA Blackwell, was introduced earlier and is ramping with interest across markets. The 3D IC platform is key for multichip architecture transitions vital for next-gen AI infrastructure, HPC, and advanced mobile. AI-driven Allegro X adoption accelerates; Infineon standardized in Q3, and ST Microelectronics adopted in Q4 for PCB design. Reality digital twin solutions maintained momentum, deployed at leading hyperscalers and AI firms. Beta CAE unlocks opportunities, especially automotive. The pending Hexagon DNE acquisition will accelerate physical AI strategy for autonomous vehicles and robotics.

In summary, Devgan expressed satisfaction with 2025 performance and excitement for business momentum. As AI accelerates, Cadence’s AI-powered EDA, SDA, and IP portfolio, enhanced by AI agents and accelerated computing, positions it exceptionally for massive opportunities. He then handed over to John M. Wall for detailed financials and outlook.

John M. Wall, Senior Vice President and Chief Financial Officer, reported an excellent 2025 close with broad momentum across businesses. Robust design activity and customer demand drove 14% revenue growth and 20% EPS growth annually. Productivity gains enabled 44.6% operating margin for the year. Q4 bookings were exceptionally strong, starting 2026 with $7.8 billion backlog. Financial highlights: Q4 revenue $1.44 billion, full-year $5.297 billion. Q4 GAAP operating margin 32.2%, year 28.2%; non-GAAP Q4 45.8%, year 44.6%. Q4 GAAP EPS $1.42, year $4.06; non-GAAP Q4 $1.99, year $7.14.

Balance sheet: year-end cash $3.001 billion, debt principal $2.5 billion. Q4 operating cash flow $553 million, full-year $1.729 billion. DSOs at 64 days; $925 million used for share repurchases. 2026 outlook assumes stable export controls and excludes pending Hexagon acquisition. Full-year revenue $5.9-$6.0 billion; GAAP op margin 31.75-32.75%, non-GAAP 44.75-45.75%; GAAP EPS $4.95-$5.05, non-GAAP $8.05-$8.15; op cash flow ~$2 billion; ~50% free cash flow for repurchases. Q1 revenue $1.42-$1.46 billion; GAAP op margin 30-31%, non-GAAP 44-45%; GAAP EPS $1.16-$1.22, non-GAAP $1.89-$1.95. CFO commentary on investor site details further items and reconciliations.

Wall concluded positively on 2025 growth, record backlog, and 2026 setup, thanking customers, partners, and employees. The operator opened Q&A.

Q&A Session

First question from Vivek Arya, Bank of America Securities: Has there been any customer disruption or shift toward using AI to reduce demand for EDA, IP, or other tools? Any scenario where internal AI displaces Cadence tools?

Devgan responded affirmatively, framing Cadence’s software as engineering-focused, involving complex physics-based math. AI tools, including Cadence’s, invoke this software for accuracy. Agentic flows increase tool usage, as evidenced by results and customer discussions. ChipsTech AI SuperAgent automates previously manual RTL coding but still calls extensive middle and base layer tools for optimization, simulation, and verification. Customers seek more AI, plan R&D increases and engineer hires, but spend shifts to automation and compute due to exponential workloads (e.g., chips scaling from 100B to 1T gates). No discussions of reduced usage; AI tools and chip design buildouts are boosting tool consumption.

Next, Joseph D. Vruwink, Baird: On 2026 outlook, recurring revenue accelerates, supported by backlog—what are key contributors? For upfront ~20% of revenue (hardware strong in 2025), expecting repeat growth in year two of platform? Similar to strong 2023 second-gen?

Wall replied that guidance is prudent, with strong backlog momentum across businesses. AI increases workloads faster than headcount, monetized via EDA, IP, hardware, SDA proliferation. Hardware expects strong H1 but prudent H2 due to pipeline visibility. China stable at 12-13%. Key metric: 67% of 2026 revenue from beginning backlog for multiyear recurring visibility. Recurring base returns to low-teens growth.

Joseph Michael Quatrochi, Wells Fargo: Follow-up on verification/emulation hardware cycle—where in cycle? Memory availability or margin impacts from price increases?

Note: The provided transcript excerpt ends mid-question in the Q&A section. The core discussion focused on robust financials, AI innovations, product momentum, and forward guidance, positioning Cadence strongly amid AI-driven market expansion. Industry terms like EDA (Electronic Design Automation tools for IC design/verification), agentic AI (autonomous agents automating chip workflows), RTL (Register-Transfer Level design abstraction), COT (Customer-Owned Tooling), 3D IC (stacked silicon dies), PPA (Power, Performance, Area metrics), SDA (System Design and Analysis), Dynamic Duo (software+hardware users), digital twin (virtual asset simulations), and token model (usage-based licensing) contextualize the advanced semiconductor ecosystem Cadence serves.